vcs仿真

https://www.spec.org/benchmarks.html

https://en.wikipedia.org/wiki/Static_random-access_memory

https://www.eembc.org/coremark/

https://github.com/eembc/coremark

https://franzflasch.github.io/debugging/risc-v/verilog/2019/07/31/riscv-core-debugging-with-qemu.html

https://zhuanlan.zhihu.com/p/479482290

https://ysyx.oscc.cc/docs/